1. Field of the Invention
This invention relates to an ultraviolet erasable nonvolatile memory device, and more particularly to an ultraviolet erasable nonvolatile memory device using a current mirror circuit as a sense amplifier.
2. Description of the Prior Art
Nonvolatile memory devices can erase, by irradiation of ultraviolet rays or electrically, information stored in memory cells.
Meanwhile, in order to read out information stored in those memory cells, sense amplifiers are generally used. As these sense amplifiers, sense amplifiers of various structures are known. For example, there are a sense amplifier to sense a potential on a bit line to amplify the potential by an invertor to read out it, a sense amplifier to input a potential on a bit line of the reference cell and a potential on a bit line of the memory cell to a differential amplifier to provide an output by comparison between the both voltages, and the like. In addition, a sense amplifier using a current mirror circuit is also known. As the technology relating to such a sense amplifier using a current mirror circuit, there is known a technology described in '1989, IEEE, ISSCC (International Solid-State Circuits Conference), Digest of Technical Papers, on pages 138 and 139, "NONVOLATILE MEMORIES/ A 1 Mb FLASH EEPROM"'.
FIG. 1 shows such a sense amplifier using a current mirror circuit. This current mirror circuit is comprised of a pair of pMOS transistors 71 and 72. A power supply voltage Vcc is delivered to each source. The drain 78 of the pMOS transistor 71 is commonly connected to respective gates of the pMOS transistors 71 and 72. The drain of the pMOS transistor 72 serves as a sensing node 73. A potential on the node 73 is amplified by inverters 74 and 74, etc. and is outputted therefrom. A memory cell 77 in which information are stored is connected to the sensing node 73 through an nMOS transistor 75 having a low threshold voltage Vth functioning as a limiter by an invertor 81 and a column select transistor 76. Further, the drain 78 of the transistor 71 is connected to a reference cell 80 through an nMOS transistor 79 having a low threshold voltage Vth functioning as a limiter by an invertor 82 in a manner similar to the above. The memory cell 77 and the reference cell 80 are of structures comprising a floating gate and a control gate stacked through insulating films, respectively. The power supply voltage Vcc is delivered to the control gate of the reference cell. The control gate of the memory cell 77 serves as a word line.
In the sense amplifier of such a structure, a potential on the sensing node 73 rises and falls in dependency upon a difference between the current drivability of the reference cell 80 and the current drivability of the memory cell 77. A potential difference thus obtained is amplified and is read out.
However, such a sense amplifier comprised of a current mirror circuit effectively becomes operative because the memory cell 77 is of an electrically erasable type, that sense amplifier cannot be applied to a nonvolatile memory device for erasing information in memory cells by ultraviolet rays.
Namely, in the nonvolatile memory device of the structure of FIG. 1, the reference cell 80 is erased by ultraviolet rays, but the memory cell 77 is electrically erased. As a result, there is a tendency that the floating gate is charged plus by an electrical erase operation (overerase operation) of the memory cell 77. Thus, as shown in FIG. 2, the current characteristic of a ultraviolet-ray erased cell of the reference cell becomes equal to an intermediate characteristic between the current characteristic of a programmed cell and the current characteristic of an over-erased memory cell. As a result, there occurs a difference between a potential when the memory cell 77 is erased and a potential when it undergoes a write operation, and such a potential difference is read out. In FIG. 2, the ordinate and the abscissa represent a current and a control gate voltage, respectively.
However, in a nonvolatile memory device which is not of a type of electrically erasing memory cells, but a type of erasing them by ultraviolet rays, the current characteristic of an erased memory cell becomes in correspondence with the current characteristic based on erasing by ultraviolet rays of the reference cell. For this reason, the sense amplifier might erroneously judge the memory cell to be in a written state although it is erased in an extreme case because of unevenness in production, and the like.
As a measure for such an erroneous operation, there is conceivable a method of holding down the channel width of the pMOS transistor 72 constituting the current mirror circuit of FIG. 1 to one half of that of the transistor 71. However, this method presents a current characteristic different from the current characteristic of the cell. As a result, the sensitivity in a readout operation would vary to much extent in dependency upon a write level.